Acer's Stan Shih Backs NEO Semiconductor's Breakthrough in AI Memory Bottleneck

NEO Semiconductor, an AI memory company founded by Taiwanese-American engineer Fu-Chang Hsu in Silicon Valley, today announced its next-generation AI chip-embedded memory technology, X-SRAM, at FMS 2026—the world’s premier annual event for the memory and storage industry. The company also officially launched its NEO.AI platform.

Stan Shih, founder of Acer (2353-TW) and former board member of TSMC, stated, "I am optimistic about NEO Semiconductor’s continuous advancement in AI memory innovation, and I look forward to the possibilities these breakthroughs will bring to Taiwan’s and the global semiconductor industry."

The NEO.AI platform integrates two core technologies—X-SRAM and 3D X-DRAM—to address two major challenges: insufficient on-chip memory capacity in AI chips and the limitations of high-bandwidth memory (HBM) in terms of capacity and power consumption. The recognition from international expert reviewers further underscores NEO Semiconductor’s leadership in AI memory innovation and enhances its global visibility within the semiconductor sector.

With the rapid growth of generative AI and large language models (LLMs), the demand for memory capacity in AI chips continues to rise. However, traditional SRAM has approached scaling limits under advanced process nodes, constraining the growth of on-chip cache capacity. This leads to increased HBM access, resulting in higher power consumption and costs—a growing issue known as the 'AI Memory Wall.'

According to NEO Semiconductor, X-SRAM employs a completely new memory architecture that is fully compatible with cutting-edge Nanosheet CMOS processes while delivering up to five times the memory density of traditional SRAM. This advancement could enable on-chip memory capacity in AI chips to increase from the current 200–400MB range to 1–2GB. The company estimates this could reduce HBM access-related power consumption by 50% to 80%. Additionally, X-SRAM holds future potential for 3D SRAM development, potentially boosting memory density by over 20 times.

During his keynote speech, Fu-Chang Hsu also shared updates on 3D X-DRAM. This technology adopts an innovative 3D NAND-like architecture to overcome the scaling limitations of conventional DRAM. A proof-of-concept (POC) test chip has already been co-developed with the Industry-Academia Innovation Research School (IAIS) at National Yang Ming Chiao Tung University and the Taiwan Semiconductor Research Institute (TSRI) under the National Applied Research Laboratories, and the team is actively advancing toward commercialization.

Stan Shih, founder of the Acer Group and former TSMC director, remarked, "AI is rapidly transforming industries worldwide, and memory will be a critical enabler for the next phase of AI development. I am encouraged to see NEO Semiconductor consistently introducing innovative technologies like X-SRAM and NEO.AI, offering new directions to overcome the AI memory bottleneck. I have high hopes for the potential these innovations hold for Taiwan’s and the global semiconductor industry."

Fu-Chang Hsu, founder and CEO of NEO Semiconductor, said, "As traditional memory technologies approach their physical limits, the AI Memory Wall has become a key challenge for next-generation AI development. By integrating X-SRAM and 3D X-DRAM through the NEO.AI platform, we aim to enhance both on-chip memory and HBM capacity, creating a more efficient and scalable AI memory architecture. We are actively seeking collaboration with global foundry partners to jointly develop X-SRAM technology, accelerate the commercialization of next-generation AI memory, and collectively usher in a new era of AI computing."