I. 2026 Q2 Financial and Operational Details
Financial Performance (Record High for Single Quarter)
Consolidated Revenue: NT$59.843 billion, up 56.4% quarter-over-quarter.
Gross Profit and Gross Margin: Gross profit of NT$39.645 billion; gross margin rose to 66.2%.
Memory Segment: Q2 revenue of NT$51.7 billion, gross margin as high as 70.3%, operating margin (OP Margin) reached 56.9%, and capacity utilization hit 100%.
Logic (Xintang Technology): Maintained stable gross margin between 38%–39%.
Operating Profit and Margin: Operating profit of NT$28.979 billion, operating margin reached 48.4%, setting a new single-quarter record high.
Net Profit After Tax and EPS: Net profit after tax of NT$24.317 billion (net margin 40.4%), single-quarter EPS of NT$5.40.
First Half Cumulative Performance: 2026 H1 cumulative EPS reached NT$7.65 (Q1: NT$2.25).
Financial Structure and Cash Flow:
Book value per share increased to NT$36.67.
Net debt ratio decreased to 0.69, current ratio rose to 1.6.
Free cash flow amounted to NT$18.134 billion, ending cash and cash equivalents reached NT$61.826 billion.
Full-Year Capital Expenditure: Estimated at NT$39.5 billion (approximately NT$7.5 billion executed in first half), primarily allocated to wafer fabrication equipment.
Product Line Operations and Market Conditions
1. Custom Memory Solutions (CMS / DRAM)
Q2 Performance: Revenue up 78% quarter-over-quarter. Bit shipment volume down ~10% quarter-over-quarter (due to strategic inventory retention after fulfilling core customer demand), but average selling price (ASP) increased over 100% quarter-over-quarter.
Capacity and Process (Kaohsiung Fab):
Current monthly capacity at Kaohsiung fab is 15K (15,000 wafers), expected to expand to 24K by end of 2026.
Accelerating transition from 25nm to 16nm process; current 16nm yield is close to 80%, targeting 90% by year-end. Kaohsiung fab bit output is projected to double by 2027.
Major Expansion Decision (Kaohsiung Module B Launch):
With Module A reaching 24K capacity and no remaining space, the company has officially launched the Module B construction plan.
Timeline and Scale: Groundbreaking expected January 2027, equipment installation in January 2029, mid-year pilot run, and mass production in Q4. Cleanroom area will be twice that of Module A, ultimately accommodating 50K–60K monthly capacity when fully equipped.
Process Roadmap: Plans to introduce 16nm, 14nm, and 12nm processes, with EUV equipment to be introduced in the second phase.
2. Flash Memory IC Business Group (Flash / Core Storage)
Q2 Performance: Revenue up 65% quarter-over-quarter, bit shipment volume increased 15%–16% (mainly driven by larger-bit NAND wafers).
NOR Flash: Maintains global #1 market share, accounting for nearly 60% of Flash business revenue. Benefiting from AI Server (e.g., AI Rack requiring 500–600 NOR chips per unit) and Edge AI demand, demand for high-capacity (512Mb, 1Gb, 2Gb) NOR Flash is extremely strong.
SLC NAND: Advancing to 24nm process and continuing development of 19nm process. Due to competitor exits and market shifts, aims to become the world’s largest SLC NAND supplier in the next two years.
New MCP Products: Integrating in-house SLC NAND with LPDDR4, targeting miniaturized, high-performance 4G/5G automotive communication modules, FWA, and industrial M2M markets.
3. Innovative Technologies: Silicon Capacitor and Cube DRAM
Silicon Capacitor:
To address power drop and noise protection needs arising from AI high-speed computing and compact packaging (e.g., CoWoS, CoPoS, EMIB, and Blackwell 800V stepping down to micro-voltages), the company has developed the world’s highest-specification silicon capacitor (mass production spec: 3,300 nano-farad/mm², sample spec: 5,400 nano-farad/mm²).
Utilizing stacking process, dedicated wafer service capacity has been established; approximately NT$4 billion invested capacity has already been fully sold, rapidly advancing toward becoming the world’s largest supplier.
Cube DRAM: Continuously advancing customization and 3D stacking architecture, expected to become a long-term growth engine alongside Wafer-on-Wafer and Silicon Cap starting in 2027.
II. Full Q&A List from Earnings Call
Q1: What are DRAM bit shipment and production targets for this and next year? (JP Morgan - Jimmy)
General Manager Chen Pei-ming Response: This year, Kaohsiung fab operates at full 15K capacity. We previously accumulated some inventory strategically, so current monthly shipments are equivalent to about 20K wafers, and inventory will not be fully depleted by year-end. Next year (2027), Kaohsiung fab monthly capacity will increase to 24K. To accommodate strong NAND demand, Taichung fab’s DRAM capacity will be reduced from current ~12K to 7K, prioritizing resources for NAND.
Q2: Market demand and Winbond’s shipment share for Enterprise SSD (ESSD) DRAM Cache next year? (JP Morgan - Jimmy)
General Manager Chen Pei-ming Response: Winbond’s DRAM for ESSD is currently being sampled, and with LTA (Long-Term Agreement) support, ESSD DRAM is expected to account for approximately 10% of total DRAM revenue in 2027, up from 0% this year.
Q3: Current customer progress and market strategy for Silicon Cap (silicon capacitor)? (JP Morgan - Jimmy)
General Manager Chen Pei-ming Response: Winbond provides Silicon Cap services via a foundry model, so we cannot disclose customer names. Due to physical thickness limitations, MLCCs cannot fit into ultra-thin advanced packages, while silicon capacitors offer superior temperature resistance and precision. The top global MLCC giants are entering and have largely become Winbond customers.
Q4: How do customers determine Silicon Cap design scale? What are the engineering and process advantages? (Morgan Stanley - Daniel)
General Manager Chen Pei-ming Response: Customers determine the number of series/parallel cells based on system-required total capacitance and voltage tolerance. Winbond uses a stacking process, which enables much higher capacitance density in small areas compared to logic fabs’ trench process, offering significant space and cost advantages.
Q5: Capital expenditure (Capex) and equipment installation plan for Kaohsiung Module B? (Morgan Stanley - Daniel)
General Manager Chen Pei-ming: Module B is large-scale, and investment will be substantial. The company will install equipment in phases (e.g., 10K, 20K, 30K wafers) based on customer demand and LTAs. Currently, only 2K of the 15K in Kaohsiung fab is 16nm; this will gradually convert, targeting 16K 16nm capacity. Silicon Cap has independent capacity (previous ~NT$4 billion investment already fully utilized), not occupying the aforementioned DRAM capacity.
Q6: Price adjustment trends for DRAM and Flash in Q3? (Morgan Stanley - Daniel)
General Manager Chen Pei-ming Response:
DRAM: Prices continue to rise; Q3 price trends are expected to maintain the strong momentum seen from Q1 to Q2.
NOR Flash: As market leader, Winbond adopts a cautious and conservative pricing strategy, avoiding aggressive hikes to sustain market ecosystem stability. However, due to peers shifting to NAND/eMMC with larger increases, Winbond will moderately adjust prices upward in line with market trends.
Q7: Why are Chinese peers relatively less aggressive in NOR Flash price hikes? (Morgan Stanley - Daniel)
General Manager Chen Pei-ming Response: Winbond serves global markets (one out of every four
FACT BOX
- Source: PR Times
- Category: 財務報告
- Products / services: DRAM / NOR Flash