Cadence and Samsung Foundry Strengthen Collaboration on 2nm and 3D IC to Address Rapid Growth in AI Infrastructure and Physical AI Demand

Cadence (Nasdaq: CDNS) and Samsung Foundry announced on May 28 the development of a full portfolio of memory and interface IP for Samsung's 2nd-gen 2nm process, alongside the expansion of Cadence's agentic AI digital, custom, 3D IC, and System Design & Analysis (SDA) flow certifications. Through this collaboration, Cadence provides Samsung with next-generation AI infrastructure across data centers, edge, and intelligent devices, as well as signoff-ready platforms for physical AI design. This agreement extends the partnership announced in 2025. Specifically, it includes the expansion of Cadence's memory/interface IP, support for NVIDIA NVLink-C2C interconnects, CUDA-X GPU acceleration libraries, and high-speed SerDes, PCIe, UCIe, and major memory interfaces. The certification and enhancement of the 2nd-gen 2nm design flow allow ecosystem partners to achieve high performance, low power, and faster tape-outs. Boyd Phelps of Cadence emphasized the importance of advanced nodes and 3D IC design in the evolution of AI infrastructure, noting that the collaboration accelerates time-to-market for joint customers. Jongshin Shin of Samsung stated that they are providing robust semiconductor and 3D-IC platforms to meet the explosive demand for cutting-edge AI designs. Furthermore, NVIDIA provides high-bandwidth interconnects via NVLink-C2C and CUDA-X, while Ambarella is leveraging this collaboration to develop its next-gen 2nm edge AI platform. Both companies plan to showcase these technologies at the 'Samsung Advanced Foundry Ecosystem 2026'.