NVIDIA (NVDA-US) CEO Jensen Huang was recently invited to speak at Stanford University's course "CS153: Cutting-Edge Systems," where he discussed the future of the computing industry with students. During his lecture, he introduced a core thesis: the common perception of AI as a new application within computers—such as image recognition, text generation, or coding assistance—is already too narrow.

According to Huang, the real transformation lies in the complete reengineering of the entire computing ecosystem—spanning chips, networks, storage, data centers, and software development models—around AI. He described this as the first true "reinvention" of the computing industry since the launch of the IBM System/360.

Huang pointed out that for decades, the logic of computing has been based on programmers writing code, compilers translating it into binary, and processors executing fixed instructions. Even with the emergence of the internet, cloud computing, and mobile devices, this fundamental logic remained largely unchanged.

However, the advent of neural networks has disrupted this model. Machines no longer simply execute rigid human-defined rules; instead, they learn structures from data and generate answers, images, actions, and even code in real time based on context.

Huang argued that the term "generative" should not be limited to content creation. Models simultaneously generate intermediate reasoning processes, tool-calling commands, task planning, and action sequences. They can continuously observe their environment, invoke other software, and evaluate execution outcomes.

In other words, computing is shifting from "one-time response to demand" to "continuous operation."

Take autonomous vehicles as an example. A vehicle cannot retrieve a pre-recorded steering maneuver from a database; it must instantly interpret road conditions, pedestrians, and surroundings to make decisions. This is why Huang believes that nearly every moving machine will gradually acquire "robotic" characteristics in the future.

As Moore's Law Slows, System-Level Co-Design Becomes Key to Performance Gains

With the shift toward AI-driven computing, hardware advancement can no longer rely solely on extending traditional chip architectures to improve performance. Huang repeatedly emphasized that the core of future competition lies in "co-design"—holistically optimizing algorithms, AI models, compilers, chips, interconnect technologies, networks, storage, and data centers around shared workloads.

This philosophy traces back to the early design principles of RISC architecture, which stressed tight integration between compilers and processors rather than independent operation.

In the AI era, the scope of co-design has expanded further. It now extends beyond individual chips to encompass CPUs, GPUs, switch chips, high-speed interconnects, networks, and storage systems—forming a complete AI computing platform.

The reason is that tasks such as graphics rendering, molecular dynamics, quantum chemistry, fluid simulation, and deep learning training are all highly parallel and computationally intensive. Relying solely on general-purpose processors can no longer balance efficiency and scalability.

As the performance gains from Moore's Law slow down, the industry is turning to architectural innovation—rethinking parallel computing, data flow, and communication methods—to continuously boost overall computing power.

Huang stated that through cross-software, cross-hardware, and cross-system-level integration and optimization, NVIDIA has achieved approximately a 1 million-fold improvement in computing performance for certain AI workloads over the past decade.

However, this figure reflects progress in overall system performance, not a dramatic leap in the performance of a single GPU. Consequently, in the post-Moore's Law era, the market's competitive focus is shifting from "which chip is fastest" to "which complete computing system can most efficiently complete real-world AI workloads."

Don't Just Focus on MFU—What Truly Matters Is the AI Value a System Produces

During the class discussion, a student brought up the Model FLOPs Utilization (MFU) metric, commonly used in large AI clusters.

Generally, a higher MFU indicates fuller utilization of GPU resources, meaning expensive computing equipment isn't sitting idle. However, Huang argued that over-reliance on this metric can lead to misjudging system performance.

He pointed out that the performance of large AI computing platforms depends not only on GPU compute power but also on video memory bandwidth, memory capacity, network interconnects, and storage systems. Any of these components can become a bottleneck, so system designs often include resource headroom to prevent a single bottleneck from slowing down the entire computation.

In other words, even if some GPUs are not fully loaded at certain times, it doesn't necessarily mean the system is inefficient. If one obsessively pursues higher MFU by deliberately reducing resource margins, it could amplify bottlenecks and prolong overall task duration.

This is especially evident during the AI inference phase. Each time a large language model generates a token, it must continuously read model weights and contextual information. Therefore, what often limits inference speed is not the GPU's peak floating-point performance, but the memory bandwidth collectively provided by multiple chips.

As a result, a system with a relatively modest MFU might still complete more inference tasks in the same time frame due to higher bandwidth efficiency and lower energy consumption.

Huang therefore argued that when evaluating AI infrastructure, the focus should not be on how many FLOPS a system has, but on how much valuable AI output it can produce under a given energy budget.

Even the metric "tokens generated per watt" cannot fully reflect the value differences between tokens, but it is at least closer to real business benefits than simply chasing hardware utilization.

For AI systems, what truly matters is not whether equipment is fully loaded, but whether the target tasks can be completed faster and more efficiently.

From Hopper to Feynman: NVIDIA's Architectures Target the Next Wave of AI Computing Needs

Huang stated that the design philosophy behind each generation of NVIDIA's GPU architecture is to anticipate the next stage of AI computing needs, not just solve current bottlenecks. Hopper primarily targets large-scale AI model pre-training and began laying the groundwork for related systems before the market saw billion-dollar AI supercomputers.

As the AI industry's focus gradually shifts from training to inference, Grace Blackwell NVLink 72 accelerates large language model inference and token generation by connecting 72 GPUs into a rack-scale system via high-speed interconnects, enhancing memory bandwidth.

Huang noted that compared to the previous-generation architecture, performance on related workloads has improved by approximately 50 times—far exceeding what Moore's Law could deliver.

The next-generation Vera Rubin targets AI agent applications. Since agents require long-term memory, working memory, and extensive tool usage, CPU, storage, and high-speed interconnects must be optimized alongside GPUs to reduce latency and improve overall efficiency.

Looking further ahead, the codenamed Feynman architecture will support "swarms of agents" composed of multiple AI agents, sub-agents, and various tools. Huang emphasized that NVIDIA's product roadmap is not merely about hardware upgrades, but about first predicting the operational patterns of next-generation AI software and then building corresponding computing platforms accordingly.

The Value of Open Models Goes Beyond Building Chatbots

Huang believes the significance of open models extends beyond developing chatbots. It enables different languages, industries, and research fields to have modifiable and fine-tunable AI foundation models. Since many niche markets are too small for commercial closed models to invest in, open models can accelerate AI innovation across domains.

He pointed out that AI will eventually go beyond natural language, extending into biomedical, chemical, climate science, autonomous driving, and robotics fields. These applications require specialized model architectures and training methods, not direct application of large language models.

To this end, NVIDIA has already launched multiple foundation models such as Nemotron, BioNeMo, Alpamayo, GR00T, and climate models to help build AI ecosystems across various fields.

Huang also emphasized that future AI will integrate language reasoning with world models (World Model), enabling systems not only to recognize objects but also to understand environments, infer causality, and make autonomous decisions—such as improving the safety of autonomous driving.

Moreover, he believes open models also benefit safety research, allowing more researchers to inspect model behavior, discover vulnerabilities, and build more effective AI defense mechanisms, rather than confining the attack-defense race to a few closed models.

AI Should Be Integrated into All Disciplines, But Foundational Skills Remain Irreplaceable

Regarding AI education, Huang believes AI should not be treated as a standalone course but as a learning tool integrated into all disciplines, helping students read papers, search for information, write code, conduct experiments, and solve problems.

However, he emphasized that foundational skills

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  • Source: PR Times
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