AI Chip War Escalates to System Platforms! MediaTek Prepares $5 Billion Financing to Support Suppliers' Expansion When Needed

The competition in AI chips is no longer just about comparing the performance of individual ASICs; it has extended to the integration of advanced processes, packaging, substrates, memory, and entire system platforms. With the first AI accelerator ASIC nearing mass production, MediaTek (2454) announced today (31st) that its board has approved a total flexible financing budget of $5 billion. Based on the exchange rate from the third-quarter operational outlook, this amounts to approximately NT$160 billion. This funding will not only secure key supply chain production capacity but also reserve capital for the company’s transition from AI ASIC chips to subsystems and platforms.

$5 billion not for immediate debt: Kuo Tai-wei emphasizes securing funding options

MediaTek's CFO, Kuo Tai-wei, emphasized that the company's financial structure remains solid. The board's approval of the $5 billion financing budget does not mean MediaTek will immediately borrow or deploy the full amount. Instead, it establishes a flexible financing framework that can be activated as needed.

"This is mainly about securing options and flexibility," Kuo stated. The AI industry is evolving rapidly—global supply chain capacity and allocation are continuously changing, while AI ASICs may give rise to new business models. The company aims to be able to quickly access funds when necessary to support long-term growth.

As of the end of the second quarter, MediaTek held NT$198.403 billion in cash and liquid financial assets, with end-of-period cash and cash equivalents reaching NT$189.001 billion. Compared to its existing cash reserves, the $5 billion facility signals MediaTek’s preparation for a larger-scale data center business.

Supporting suppliers’ expansion when needed to prevent production bottlenecks

When asked whether the financing could be used to assist key suppliers in expanding production, Kuo gave an affirmative response. If demand for AI ASICs and customer orders grow, MediaTek may use the funds to strengthen cooperation with supply chain partners and ensure required production capacity.

However, MediaTek has not yet disclosed which suppliers might be supported, the amounts involved, or the investment methods, nor has it announced any specific investment projects. Therefore, this remains a potential use of the financing budget, not a confirmed expansion plan.

Large-scale AI accelerators involve wafer foundry, advanced packaging, substrates, HBM memory, and other components. As die size increases and packaging complexity rises, suppliers’ yields, production capacity, and cycle times could directly impact customers’ project mass production.

MediaTek’s Vice Chairman and CEO Tsai Li-ming stated that the company, in addition to conducting Design-Technology Co-Optimization (DTCO) with TSMC, is closely collaborating with advanced packaging partners and integrating key components such as memory and substrates to assist customers in completing complex AI ASIC projects.

Moving beyond delivering ASICs to pre-validated subsystems

As data center chip complexity increases, MediaTek is expanding its business from single AI ASICs to pre-validated subsystems and platforms, integrating memory, I/O, connectivity, D2D interfaces, and advanced packaging to reduce customer design complexity.

Tsai said data center customers want to integrate custom chips into systems faster. By providing pre-validated subsystems, MediaTek helps customers shorten development and time-to-market. Compared to one or two years ago, the company is moving from offering individual IPs to IP integration and system-level solutions.

MediaTek is also advancing rack-like design solutions that integrate D2D, 3.5D packaging, and NVLink Fusion connectivity into subsystems and has already begun discussions with potential customers. However, the company has not yet provided timelines for mass production or revenue contribution for these solutions.

448G SerDes with co-package copper interconnect—next step toward CPO

In high-speed data center connectivity, MediaTek is developing 448G SerDes and pairing it with a Co-Package Copper (CPC) system solution to enhance performance and energy efficiency.

Tsai stated that the 448G SerDes development is progressing well and is expected to be ready by 2027, possibly in the second half. MediaTek continues to develop D2D interfaces and packaging capabilities required for large chips, integrating different IPs into subsystems for rapid customer adoption.

After 448G, MediaTek will develop a Co-Packaged Optics (CPO) system solution on TSMC’s COUPE platform to support next-generation data center high-speed connectivity needs, while also providing an end-to-end 3.5D platform integrating 3.5D IP, packaging technology, and design flows.

Kuo noted that copper interconnects can still be used to advance up to 448G, but if next-generation systems require even higher speeds, a shift to optical interconnects may be necessary. MediaTek has already planned its future product roadmap accordingly.

Dual-track strategy with CoWoS and EMIB-T; HBM remains mainstream in the short term

In advanced packaging, MediaTek has the capability to assist customers in developing ultra-large ASICs using both CoWoS and EMIB-T technologies. Tsai said that substrate yield, packaging capacity, and production cycle for the second AI ASIC are continuously improving, and the company is confident in achieving mass production by 2028.

Regarding some players attempting to use LPDDR architecture to replace HBM and alleviate supply pressure, Kuo stated that while different technical routes exist in the market, HBM remains the mainstream choice for ultra-large cloud service providers pursuing maximum performance in the short term.

To support its expanding data center and AI strategy, MediaTek has announced three senior executive promotions: Huang Shih-an, Senior General Manager of the Computing and Artificial Intelligence Business Unit; Fan Ming-hsi, Senior General Manager of the Wireless Communications Systems and Technology Business Unit; and Ankireddy Nalamalpu, Senior General Manager of the Data Center and Artificial Intelligence Business Unit, have all been promoted to Vice President.

From the $5 billion financing facility, advanced packaging, and supply chain integration to 448G SerDes, CPO, and system platforms, MediaTek’s AI strategy is no longer limited to custom chip design but is gradually transforming into a system-level partner for data centers.